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LT1464 - デュアル/クワッド・マイクロパワー1MHz C

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LT1464 - デュアル/クワッド・マイクロパワー1MHz C
LT1464/LT1465
LT1464/LT1465
デュアル/クワッド・マイクロパワー
1MHz C-Loadピコアンペア
バイアス電流JFET入力オペアンプ
特長
概要
■
LT®1464( デュアル)およびLT1465( クワッド)は、ピコ
アンペア入力バイアス電流(500fA標準)と10nFまでの容
量性負荷に対してユニティゲイン安定動作を提供する最
初のマイクロパワー・オペアンプ(1アンプ当たり最大
200µA)です。出力は、1桁以上高い電流を必要とするオ
ペアンプと同様に、10k負荷をいずれかの電源の1.5V以
内に振幅させることができます。このユニークな性能を
兼ね備えているため、LT1464/LT1465は広範な入力およ
び出力インピーダンスに対し最適なデバイスです。
■
■
■
■
■
■
■
■
入力バイアス電流:20pA最大
電源電流/アンプ:200µA最大
利得バンド幅積:1MHz標準
スルーレート:0.9V/µs標準
入力同相範囲には正レールが含まれる
C-Load™によって10nFまでユニティゲインで安定
±5V、±15V電源でスペックを保証
マッチング特性を保証
標準ピン配置:SO-8、SO-14パッケージ
LT1464/LT1465の設計およびテストでは、特に±15Vおよ
び±5V電源を使用した低コストのSO-8
(デュアル)および
14ピンSOパッケージ(クワッド)で最適な性能が得られる
よう配慮されています。
入力同相範囲には正電源レールが
含まれます。また、スルーレート(0.5V/µs最小)と利得・バ
ンド幅積(650kHz最小)は100%テストされています。さら
に、
完全なマッチング仕様も提供されています。
アプリケーション
■
■
■
■
バッテリ電源機器
フォトカレント・アンプ
低周波、マイクロパワー・アクティブフィルタ
低垂下トラック&ホールド回路
、LTC、LTはリニアテクノロジー社の登録商標です。
C-Loadはリニアテクノロジーの商標です。
U
TYPICAL APPLICATION
Micropower Low Droop Track-and-Hold/Peak Detector
V+
A
1/4 LTC201 13
15
4
14
1 MCT2
5
V+
V–
5
2
+
1/2 LT1464
6
IN
1/4 LTC201
B
7
4
–
1 MCT2
5
–
8
3
1
+
6
4
3
MODE
Track
Reset
Reset
LTC201 switch is open for logic "1".
IN A
0
0
0
IN B
0
0
0
VOUT
4
V–
2
FUNCTION
Track-and-Hold
Positive Peak Detector
Negative Peak Detector
2
1/2 LT1464
2
2-26
6
R1*
1
5
Small-Signal Response, CLOAD = 10nF
C1
10nF
POLYSTYRENE
16
LT1464 • TA01
0.5pA
= 0.05mV/s
10nF
TOTAL SUPPLY CURRENT = 460µA MAX
* R1 = 600Ω FOR ±15V SUPPLIES
R1 = 0Ω FOR ±5V SUPPLIES
TYPICAL DROOP =
MODE IN A
Hold
1
Store
0
Store
1
IN B
1
1
0
AV = 1
VS = ±5V, ±15V
CL = 10nF
1464 • TA02
LT1464/LT1465
W W
U
W
ABSOLUTE MAXIMUM RATINGS
Supply Voltage ..................................................... ±20V
Differential Input Voltage ...................................... ±40V
Input Current ....................................................... 20mA
Output Short-Circuit Duration ......................... Indefinite
Operating Temperature Range ............... – 40°C to 85°C
Specified Temperature Range ................ – 40°C to 85°C
Maximum Junction Temperature ......................... 150°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
W
U
U
PACKAGE/ORDER INFORMATION
ORDER PART
NUMBER
TOP VIEW
OUT A 1
8
V+
–IN A 2
7
OUT B
6
–IN B
5
+IN B
A
+IN B 3
B
V– 4
N8 PACKAGE
8-LEAD PDIP
S8 PACKAGE
8-LEAD PLASTIC SO
LT1464CN8
LT1464CS8
TJMAX = 150°C, θJA = 130°C/ W (N)
TJMAX = 150°C, θJA = 190°C/ W (S)
14 OUT D
OUT A 1
–IN A 2
+IN A 3
A
13 –IN D
LT1465CN
LT1465CS
12 +IN D
11 V–
B
C
10 + IN C
–IN B 6
9
– IN C
OUT B 7
8
OUT C
N PACKAGE
14-LEAD PDIP
1464
D
V+ 4
+IN B 5
S8 PART MARKING
ORDER PART
NUMBER
TOP VIEW
S PACKAGE
14-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 110°C/ W (N)
TJMAX = 150°C, θJA = 150°C/ W (S)
Consult factory for Industrial and Military grade parts.
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
VS = ±15V, VCM = 0V, TA = 25°C, unless otherwise noted.
CONDITIONS (Note 1)
MIN
VS = ±5V
VS = ±15V
TYP
MAX
UNITS
0.4
0.6
0.8
2.0
mV
mV
VOS
Input Offset Voltage
IOS
Input Offset Current
0.3
15
pA
IB
Input Bias Current
±0.5
±20
pA
en
Input Noise Voltage
0.1Hz to 10Hz
2
µVP-P
Input Noise Voltage Density
fO = 10Hz
fO = 1000Hz
33
24
nV/√Hz
nV/√Hz
Input Noise Current Density
fO = 10Hz, 1kHz (Note 3)
0.4
fA/√Hz
CMRR
Common Mode Rejection Ratio
VCM = – 12.5V to 15V
74
85
dB
PSRR
Power Supply Rejection Ratio
VS = ±2.5V to ±20V
78
90
dB
1012
1012
1011
Ω
Ω
Ω
3
pF
RIN
Input Resistance—Differential
Common Mode
Common Mode
CIN
Input Capacitance
AVOL
Large-Signal Voltage Gain
VCM = – 12.5V to 8V
VCM = 8V to 15V
VO = ±10V, RL = 10k
VO = ±10V, RL = 2k
300
150
900
450
V/mV
V/mV
VS = ±5V, VO = ±2V, RL = 10k
VS = ±5V, VO = ±1V, RL = 2k
100
50
250
170
V/mV
V/mV
2-27
LT1464/LT1465
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
VS = ±15V, VCM = 0V, TA = 25°C, unless otherwise noted.
CONDITIONS (Note 1)
MIN
TYP
MAX
UNITS
VOUT
Output Voltage Swing
RL = 10k
RL = 2k
VS = ±5V, RL = 2k
±13.5
±13.3
±3.5
±13.7
±13.5
±3.7
SR
Slew Rate
RL = 10k (Note 4)
0.5
0.9
V/µs
GBW
Gain Bandwidth Product
f = 10kHz
650
1000
kHz
IS
Supply Current per Amplifier
V
V
V
200
200
µA
µA
VS = ±5V
145
135
Channel Separation
f = 10Hz, VO = ±10V, RL = 10k
132
VOS
Offset Voltage Match (Note 7)
VS = ±5V
VS = ±15V
0.5
0.8
1.3
3.3
mV
mV
∆IB+
Noninverting Bias Current Match (Note 7)
0.5
30
pA
∆CMRR
Common Mode Rejection Match
(Notes 5, 7)
71
85
dB
∆PSRR
Power Supply Rejection Match
(Notes 5, 7)
74
88
dB
MIN
TYP
MAX
dB
VS = ±15V, VCM = 0V, 0°C ≤ TA ≤ 70°C, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS (Note 1)
UNITS
VOS
Input Offset Voltage
VS = ±5V
VS = ±15V
●
●
0.5
0.9
1.4
2.8
mV
mV
∆VOS
∆Temp
Average Input Offset Voltage Drift
(Note 6)
●
7
20
µV/°C
IOS
Input Offset Current
●
25
450
pA
IB
Input Bias Current
●
150
750
pA
CMRR
Common Mode Rejection Ratio
VCM = – 12V to 15V
●
73
85
dB
PSRR
Power Supply Rejection Ratio
VS = ±3V to ±20V
●
77
89
dB
AVOL
Large-Signal Voltage Gain
VO = ±10V, RL = 10k
VO = ±10V, RL = 2k
●
●
200
100
600
350
V/mV
V/mV
VS = ±5V, VO = ±2V, RL = 10k
VS = ±5V, VO = ±1V, RL = 2k
●
●
80
45
200
150
V/mV
V/mV
VOUT
Output Voltage Swing
RL = 10k
RL = 2k
VS = ±5V, RL = 2k
●
●
●
±13.4
±13.2
±3.4
±13.6
±13.4
±3.6
SR
Slew Rate
RL = 10k (Note 4)
●
0.4
0.8
V/µs
GBW
Gain Bandwidth Product
f = 10kHz
●
540
870
kHz
IS
Supply Current per Amplifier
VS = ±5V
●
●
160
150
220
220
µA
µA
VOS
Offset Voltage Match (Note 7)
VS = ±5V
VS = ±15V
●
●
0.7
0.9
2.0
3.5
mV
mV
∆IB+
Noninverting Bias Current Match (Note 7)
●
35
500
pA
∆CMRR
Common Mode Rejection Match
(Notes 5, 7)
●
70
84
dB
∆PSRR
Power Supply Rejection Match
(Notes 5, 7)
●
73
85
dB
2-28
V
V
V
LT1464/LT1465
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
VS = ±15V, VCM = 0V, – 40°C ≤ TA ≤ 85°C (Note 2), unless otherwise noted.
CONDITIONS (Note 1)
MIN
TYP
MAX
UNITS
VOS
Input Offset Voltage
VS = ±5V
VS = ±15V
●
●
0.6
1.0
1.5
3.0
mV
mV
∆VOS
∆Temp
Average Input Offset Voltage Drift
(Note 6)
●
7
20
µV/°C
IOS
Input Offset Current
●
60
700
pA
IB
Input Bias Current
●
300
2500
pA
CMRR
Common Mode Rejection Ratio
VCM = –12V to 15V
●
72
84
dB
PSRR
Power Supply Rejection Ratio
VS = ±3V to ±20V
●
76
88
dB
AVOL
Large-Signal Voltage Gain
VO = ±10V, RL = 10k
VO = ±10V, RL = 2k
●
●
175
80
400
250
V/mV
V/mV
VS = ±5V, VO = ±2V, RL = 10k
VS = ±5V, VO = ±1V, RL = 2k
●
●
70
45
180
140
V/mV
V/mV
VOUT
Output Voltage Swing
RL = 10k
RL = 2k
VS = ±5V, RL = 2k
●
●
●
±13.2
±13.0
±3.2
±13.4
±13.2
±3.4
SR
Slew Rate
RL = 10k (Note 4)
●
0.35
0.7
V/µs
GBW
Gain Bandwidth Product
f = 10kHz
●
510
850
kHz
IS
Supply Current per Amplifier
VS = ±5V
●
●
165
160
230
230
µA
µA
VOS
Offset Voltage Match (Note 7)
VS = ±5V
VS = ±15V
●
●
0.8
1.0
2.5
4.0
mV
mV
∆IB+
Noninverting Bias Current Match (Note 7)
●
70
800
pA
∆CMRR
Common Mode Rejection Match
(Notes 5, 7)
●
69
83
dB
∆PSRR
Power Supply Rejection Match
(Notes 5, 7)
●
73
81
dB
The ● denotes specifications which apply over the full operating
temperature range.
Note 1: Typical parameters are defined as 60% yield of parameter
distributions of individual amplifiers, i.e., out of 100 LT1465s (or 100
LT1464s) typically 240 op amps (or 120) will be better than the indicated
specification.
Note 2: The LT1464 and LT1465 are designed, characterized and expected
to meet these extended temperature limits, but are not tested at – 40°C
and 85°C. Guaranteed I grade parts are available, consult factory.
Note 3: Current noise is calculated from the formula: in = (2qib)1/2 where
q = (1.6)(10)–19 coulomb. The noise of source resistors up to 1GΩ
swamps the contribution of current noise.
V
V
V
Note 4: Slew rate is measured in AV = –1; input signal is ±7.5V, output is
measured at ±2.5V.
Note 5: ∆CMRR and ∆PSRR are defined as follows:
1. CMRR and PSRR are measured in µV/V on the individual amplifiers.
2. The difference is calculated between the matching sides in µV/V.
3. The result is converted to dB.
Note 6: This parameter is not 100% tested.
Note 7: Matching parameters are the difference between amplifiers A and
D and between B and C on the LT1465; between the two amplifiers on the
LT1464.
2-29
LT1464/LT1465
U W
TYPICAL PERFORMANCE CHARACTERISTICS
Input Bias Current Over the
Common Mode Range
Input Bias and Offset Current vs
Temperature
16
80
VS = ±15V
TA = 25°C
1000
BIAS CURRENT
100
OFFSET CURRENT
10
1
25
75
100
50
AMBIENT TEMPERATURE (°C)
60
125
50
40
30
20
10
–5
0
–10
5
10
COMMON MODE INPUT VOLTAGE (V)
VS = ±5V
100
75
0.1Hz to 10Hz Noise
30
1/f CORNER = 9Hz
20
10
30
100 300 1k
FREQUENCY (Hz)
RL = 2k, VS = ±15V
400
0 25 50 75 100 125 150
TEMPERATURE (°C)
LT1464 • TPC07
2
6
4
TIME (SEC)
8
1.75
Channel Separation vs Frequency
SLEW FALL
1.50
1.25
1.5
160
1.3
140
1.1
GAIN BANDWIDTH
1.00
0.9
SLEW RISE
VS = ±15V
0.50
–75 –50 –25
10
LT1464 • TPC06
Slew Rate, Gain Bandwidth
Product vs Temperature
0.75
RL = 2k, VS = ±5V
RL = 10k, VS = ±5V
0
10k
LT1464 • TPC05
SLEW RATE (V/µs)
RL = 10k, VS = ±15V
800
3k
0.7
0.5
0 25 50 75 100 125 150
TEMPERATURE (°C)
LT1464 • TPC08
GAIN BANDWIDTH (MHz)
VOLTAGE GAIN (V/mV)
LT1464 • TPC03
50
3
VO = ±10V, VS = ±15V
VO = ±2V, RL = 10k, VS = ±5V
VO = ±1V, RL = 2k, VS = ±5V
2-30
100 125
10
100 125
Voltage Gain vs Temperature
0
–75 –50 –25
–75 –50 –25 0
25 50 75
TEMPERATURE (°C)
15
VS = ±15V
TA = 25°C
70
LT1464 • TPC04
200
VS = ±15V
NOISE VOLTAGE (2µV/DIV)
RMS VOLTAGE NOISE DENSITY (nV/√Hz)
SUPPLY CURRENT PER AMPLIFIER (µA)
VS = ±15V
150
600
–13
Voltage Noise vs Frequency
175
1k
–12
LT1464 • TPC02
200
1.2k
–11
–15
100
1.4k
12
–14
Supply Current vs Temperature
50
–75 –50 –25 0
25 50 75
TEMPERATURE (°C)
13
–10
–15
LT1464 • TPC01
125
14
0
CHANNEL SEPARATION (dB)
0
15
COMMON MODE RANGE (V)
70
INPUT BIAS CURRENT (pA)
INPUT BIAS AND OFFSET CURRENT (pA)
10000
Common Mode Range vs
Temperature
VS = ±15V
TA = 25°C
VIN = 10VP-P
RL = 10k
120
100
80
60
10
100
10k
1k
FREQUENCY (Hz)
100k
1M
LT1464 • TPC09
LT1464/LT1465
U W
TYPICAL PERFORMANCE CHARACTERISTICS
120
VS = ±15V
TA = 25°C
60
PHASE
60
30
40
20
20
GAIN
10
0
60
40
20
–40
–10
0.01
0.1
1
FREQUENCY (MHz)
60
NEGATIVE
SUPPLY
40
20
–20
0
POSITIVE
SUPPLY
80
CMRR (dB)
VOLTAGE GAIN (dB)
PHASE MARGIN = 66°,
CL = 10pF
100
80
PHASE MARGIN (DEG)
80
TA = 25°C
VS = ±15V
TA = 25°C
100
50
40
120
100
PSRR (dB)
70
Power Supply Rejection Ratio vs
Frequency
Common Mode Rejection Ratio vs
Frequency
Gain and Phase vs Frequency
0
0
10
10
100
10k
1k
FREQUENCY (Hz)
10k
10
1M
100
1k
10k
FREQUENCY (Hz)
LT1464 • TPC10
LT1464 • TPC12
LT1464 • TPC11
Common Mode and Power Supply
Rejections vs Temperature
Phase Margin vs CLOAD
100
95
PSRR
70
CMRR, PSRR (dB)
PHASE MARGIN (DEG)
80
60
50
40
30
20
90
CMRR
85
80
CL = 0pF
VS = ±15V
TA = 25°C
AV = 1
VS = ±2.5V TO ±20V FOR PSRR
VS = ±15V, VCM = –12V TO 15V FOR CMRR
OUTPUT IMPEDANCE (Ω)
VS = ±15V
TA = 25°C
90
Closed-Loop Output Impedance
1000
100
1M
100k
100
CL = 1000pF
10
CL = 10nF
1
75
10
70
–75 –50 –25 0
25 50 75
TEMPERATURE (°C)
0
1
100
1000
10
CAPACITIVE LOAD (pF)
10000
Large-Signal Response,
VS = ±15V
0V
AV = 1
CL = 10pF
20µs/DIV
LT1464 • TPC16
1k
10k 100k
FREQUENCY (Hz)
1M
10M
Small-Signal Response,
VS = ±5V, ±15V, CLOAD = 1000pF
50mV/DIV
0V
100
LT1464 • TPC15
Small-Signal Response,
VS = ±5V, ±15V
20mV/DIV
5V/DIV
10
LT1464 • TPC14
LT1464 • TPC13
AV = 1
CL = 10pF
0.1
100 125
0V
AV = 1
CL = 1000pF
0.5µs/DIV
LT1464 • TPC17
5µs/DIV
LT1464 • TPC18
2-31
LT1464/LT1465
アプリケーション情報
逆位相保護
ほとんどの業界標準JFET入力シングル、デュアル、お
よびクワッドのオペアンプでは、入力が負の同相制限範
囲を超えると、出力で位相反転が起こります。同相範囲
は±5V電源では重要です。以下の図に、±5.2Vの正弦
波入力(図1a)、ユニティゲイン・フォロワモードでの競
(1a) ±5.2V Sine Wave
合JFET入力オペアンプの応答(図1b)、およびLT1464/
LT1465の応答(図1c)を示します。
図1bのように位相反転が起こると、サーボ機構がロック
アップする可能性があります。LT1464/LT1465は、同相入
力が電源電圧内にあるときには位相反転を起こしません。
LT1464 • F01b
LT1464 • F01a
(1b) Typical JFET Input Op Amp
with ±5V Supplies
LT1464 • F01c
(1c) LT1464/LT1465 Output
with ±5V Supplies
Figure 1. Voltage Follower with Input Exceeding the Common Mode Range (VS = ±5V)
2-32
LT1464/LT1465
U
TYPICAL APPLICATIONS
Low Voltage 0.016% Voltage to Frequency Converter
LT1009
VREF = –2.5V
R3
1k
–5V
C4
1µF
17
1/2 LTC®1043
5V
8
7
fOUT: 0kHz to 30kHz
11
14
RIN
VIN
0V TO 5V
6.19k
13
12
4
GAIN
2.5k
5
)( )
VIN
1
(RIN)(CIN) VREF
16
8
+
7
1/2 LT1464
C1
0.1µF
(
CIN
0.01µF
5V
6
fOUT =
–
4
–5V
C2
30pF
R1
20k
R3
330k
Q1
2N2907A
C3
1µF
–5V
LT1464 • TA03
10Hz 4th Order Chebyshev Lowpass Filter (0.01dB Ripple)
R2
237k
R5
154k
C1
33nF
R1
237k
R3
249k
VIN
C2
100nF
C3
10nF
15V
2
–
4
1/4 LT1465
3
1
R4
154k
R6
249k 13
–
12
+
+
11
C4
330nF
1/4 LT1465
14
VOUT
LT1464 • TA05
–15V
TYPICAL OFFSET ≈ 0.6mV
1% TOLERANCES
FOR VIN = 10VP-P, VOUT = –110dB AT f > 300Hz
VOUT = –6dB AT f = 16Hz
THE LOW INPUT BIAS CURRENTS ALLOW THE USE OF HIGH RESISTOR VALUES
2-33
LT1464/LT1465
W
W
SI PLIFIED SCHE ATIC
VCC
R20
R6
R3
R4
Q3
×4
Q4
J3
R5
R7
Q5
J4
Q17
Q7
R17
– IN
Q18
Q20
J5
R22
C2
R10
Q16
+IN
Q22
R18
OUT
J1 J2
VCC
VCC
Q21
C1
Q15
Q28
VEE
Q25
Q13
Q14
Q1
Q8
R5
Q23
R16
Q11
10µA
R1
R19
R1O
Q29
Q2
Q9
R2
R5
Q19
Q24
VEE
Q10
Q26
Q27
R10
1464 SS
VEE
2-34
LT1464/LT1465
U
TYPICAL APPLICATION
Low Voltage 0.027% Frequency to Voltage Converter
R2
75k*
10k
GAIN TRIM
C2
1µF
R1
1k
13
LT1004-1.2C
2
14
C1
1µF
–
8
1/2 LT1464
3
12
fIN = FREQUENCY IN
0kHz to 30kHz
5V
1/4 LTC1043
VREF = –1.235V
–5V
16
CS
1000pF
4
5V
17
–5V
+
1
0V TO 3V
OUTPUT
4
–5V
VOUT = (R2)(CS)(VREF)fIN
* TRW#MTR-5/120ppm
LT1464 • TA04
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1057
Dual JFET Input Precision, High Speed Op Amp
Fast Settling Time, 14V/µs Slew Rate, 5Mhz GBW, 450µV
VOS (Max), 50pA IOS (Max)
LT1113
Dual Low Noise, Precision, JFET Input Op Amp
6nV/√Hz Input Noise Voltage Density, 480pA IB, 6.3MHz GBW
LT1169
Dual Low Noise, Picoampere Bias Current,
JFET Input Op Amp
20pA IB, 8nV/√Hz en, 5.3MHz GBW, 1.5pF Input Capacitance
LT1457
Dual Precision JFET Input Op Amp C-Load
Drives 10,000pF Capacitive Load, 450µV VOS (Max), 4µV/°C Drift
LT1462/LT1463
Dual/Quad Micropower, C-Load Picoampere Bias
Current JFET Input Op Amps
28µA Supply Current Per Amplifiers Drives 10µF Capacitive Load, 175kHz GBW
2-35
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